1. Field of the Invention
The present invention relates to a pattern correction method, a storage medium, an information processing apparatus, a method of manufacturing a mask, an exposure apparatus, and a method of manufacturing a device.
2. Description of the Related Art
When manufacturing a semiconductor device, it is important to faithfully transfer a design pattern to a substrate using an exposure apparatus. In recent years, however, a low-k1 process is widely used as the miniaturization and large-scale integration of a semiconductor integrated circuit progress. When the low-k1 process is used for a conventional two-dimensional circuit pattern, a pattern formed on a mask and a pattern transferred to a substrate using it have largely different shapes because of the proximity effect. Even when complex proximity effect correction is performed for the mask pattern, faithfully transferring the design pattern to the substrate may be difficult. To cope with this, a technique called a one-dimension layout technique is proposed in non-patent literature 1.
The one-dimension layout technique disclosed in non-patent literature 1 is a technique of forming line and space (L & S) patterns having a single pitch on a substrate in advance and partially removing the line patterns to form a circuit pattern. In the one-dimension layout technique, a mask on which a plurality of pattern elements (cut patterns) are formed is used. The plurality of cut patterns correspond to portions to remove the line patterns. The cut patterns are transferred to the substrate, and the line patterns of the transferred portions are removed, thereby forming a circuit pattern.
Non-patent literature 2 proposes a method of performing proximity effect correction for each cut pattern to faithfully transfer a plurality of cut patterns to a substrate in the one-dimension layout technique. In the non-patent literature 2, the dimension of each cut pattern is calculated based on a design value that is the same for all cut patterns, and a cut pattern dimension is calculated such that the transferred pattern obtains the target dimension.
A mask used in the one-dimension layout technique generally has a plurality of cut patterns having the same shape. There exist regions where the cut pattern density is high and regions where the density is low. For this reason, the proximity effect affects the cut patterns in different manners, and the dimension of each cut pattern whose transferred pattern on the substrate obtains the target dimension also changes. Hence, when the dimension of a cut pattern whose transferred pattern on the substrate obtains the target dimension is calculated based on the design value that is the same for all cut patterns, the number of times of repeated computation necessary for the calculation increases. Hence, a long time is needed for calculating the dimensions of the cut patterns.
[Non-Patent Literature 1] Michael C. Smayling et. al., “Low k1 Logic Design using Gridded Design Rules”, Proc. of SPIE, USA, SPIE, 2008, Vol. 6925, p. 69250B
[Non-Patent Literature 2] Koichiro Tsujita et. al., “Supreme lithographic performance by simple mask layout based on lithography and layout co-optimization”, Proc. of SPIE, USA, SPIE, 2011, Vol. 7973, p. 79730D